Innosilicon 低功耗、混合信号 HDMI TX/RX IP提供完整的包含PHY和(hé)控制器(qì)controller的HDMI 2.1/2.0/1.4 标準兼容接口解決方案,用于傳輸視頻和(hé)音頻流。
每通(tōng)道高達 12Gb/s 的傳輸速率,支持 3D 和(hé)從 480i 到 8K@60/50Hz 的分辨率。 此 HDMI 解決方案針對面積和(hé)功率進行了優化,包含所有必要的 PHY 組件,包括高速 I/O、初級和(hé)次級 ESD、PLL 以及視頻、音頻和(hé)控制處理單元。
該IP的設計考慮了生産測試支持,其中(zhōng)包含 BIST、環回和(hé)邊界掃描。
The Innosilicon low power, mixed signal HDMI-IP™ Transmitter provides a complete HDMI 2.1/2.0/1.4 standard compliant interface solution for delivering video and audio streams.
With a transmission rate up to 12Gb/s per channel, it supports 3D and resolutions from 480i to 8K@60/50Hz. Optimized for both area and power, this HDMI solution contains all necessary PHY components including high speed I/Os, primary and secondary ESD, and PLL along with video, audio and control processing units.
This PHY is designed with production test support in mind with BIST, loop back and boundary scan all incorporated.
All major processes fully covered, such as 110nm, 55nm to 28nm, 22nm, 14nm, 12nm, 8nm, 7nm, 6nm, 5nm.
Power consumption: typical<75mW @ 12Gbps(14nm)
Compliant with HDMI2.1, HDMI2.0, HDMI1.4 and DVI1.0 specifications
Up to 12Gbps per data channel
Video support includes
3D and 8K@60/50Hz
DTV 480i/p, 576i/p, 720i/p, 1080i/p
Color depth of 24, 30 or 36bits RGB & YcbCr
YcbCr 4:2:0 2160p@60/50Hz
SPDIF output supports PCM, Dolby Digital, DTS (32-1536kHz F/s) using IEC60958 and IEC 61937
Support programmable output swing, termination and pre-emphasis
Built-in low jitter PLL and bandgap reference
Smallest area can down to 0.53mm2 including IO and ESD in certain processes (SMIC 14nm)
APB slave interface for internal register access
Evaluation board and test chip if available
Embedded primary and secondary ESD
Production test supported with BIST, loop back and boundary scan
Deliverables support all major EDA tools and contain a detailed integration guide
Optional HDMI controller solution available
Low power consumption
Fully customizable
Small area
Simple integration process
Available options include
Test chips and test boards
FPGA integration support
Chip level integration